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VHDL - error "choice must be discrete range" with CASE |
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#1 |
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I want to do something, if the signal "address" is in the used address
range. I don't want to list all of this adresses (128!!!) in the case structure. Compiling this structure, I'm getting the error "choice must be discrete range": SIGNAL address : STD_LOGIC_VECTOR(14 downto 0); .... CASE address IS WHEN "000010000000000" TO "000010001111111" => .... What is my mistake? How can I realize this functionality by an other structure? Thanks, Manfred Manfred Balik |
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#2 |
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Posts: n/a
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Hi Manfred,
The choices in case statement must be of discrete range , that is case expression ( here address) must be either of Enumeration or integer type . The other way doing this is given below SIGNAL address : STD_LOGIC_VECTOR(14 downto 0); process variable address_int : integer; begin address_int := TO_INTEGER(unsigned(address)); CASE address_int IS WHEN 1024 to 1279 => ........... Use unsigned and signed types. since address is considered as unsigned number hence prefer to declare it as SIGNAL address : unsigned(14 downto 0); Moreover packages numeric_std has many relavent arithmetic and conversion functions. -- Mohammed A Khader. Mohammed A khader |
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#3 |
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To use the range following a when, a scaler type must be used (natural,
integer). So if you convert the address to an natural type first, then use a natural range it should work. signal address_natural : natural range 0 to 16535; address_natural <= conv_integer(address); case address_natural is when 1024 to 1151 => "Manfred Balik" <> wrote in message news:426cd2d2$0$10578$ ... >I want to do something, if the signal "address" is in the used address >range. I don't want to list all of this adresses (128!!!) in the case >structure. > Compiling this structure, I'm getting the error "choice must be discrete > range": > > SIGNAL address : STD_LOGIC_VECTOR(14 downto 0); > ... > CASE address IS > WHEN "000010000000000" TO "000010001111111" => > .... > > What is my mistake? > How can I realize this functionality by an other structure? > > Thanks, Manfred > Jerry |
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#4 |
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On Mon, 25 Apr 2005 13:21:54 +0200, "Manfred Balik"
<> wrote: >I want to do something, if the signal "address" is in the used address >range. I don't want to list all of this adresses (128!!!) in the case >structure. >Compiling this structure, I'm getting the error "choice must be discrete >range": > >SIGNAL address : STD_LOGIC_VECTOR(14 downto 0); >... >CASE address IS > WHEN "000010000000000" TO "000010001111111" => > .... > >What is my mistake? >How can I realize this functionality by an other structure? > If you have many similar ranges, try something like CASE address(13 downto 7) IS WHEN "00001000" => If you have different size ranges, you can embed further CASE or IF clauses in the arms of this one. - Brian Brian Drummond |
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