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VHDL - Asynchronous Design

 
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Old 04-23-2005, 10:44 PM   #1
Default Asynchronous Design


Hi,
I was just wondering if asynchronous design is used much in industry at
the moment? I don't have much experience in the big bad world yet
(still a final year student but did a bit in work placement and for my
final year project) but have an interest in working in the area in the
future. Is this a significant area or are most if not all designs
synchronous?

Cheers,
Tony
Project Website: geocities.com/dutchgoldtony



dutchgoldtony
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Old 04-25-2005, 09:56 AM   #2
Neil
 
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Default Re: Asynchronous Design
yeah. I also want to know what's the most important difference between
these two, asynchronous and synchronous design. Thank you!



Neil
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Old 04-25-2005, 10:26 AM   #3
Neo
 
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Default Re: Asynchronous Design
There are a few doing asynchronous designs, their main advantage being
low power. But all the mainstream designs are synchronous and are in no
way inclined to go the asynchronous way. synchronous designs have been
tried and tested and have well defined deterministic features not
guarantedd in async designs.



Neo
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Old 04-25-2005, 11:43 AM   #4
charles.elias@wpafb.af.mil
 
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Default Re: Asynchronous Design
Asynchronous designs use no common clock for timing. Their timing
depends on hardware delays, e.g., the delay through a logic gate.
These delays are hardware and temperature dependent. A synchronous
design uses a common clock signal for its timing. So long as all of
the hardware delays are such that the inputs to clocked devices are
stable at the clock transitions (technically, within a certain time
before and a certain time after the clock transitions), then the timing
is very predictable. To me, asynchronous design is difficult and
tricky and I avoid it.



charles.elias@wpafb.af.mil
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