![]() |
|
|
|||||||
![]() |
VHDL - Test Vectors of 2's Complement Adder and Substractor /Accumulator/MACs |
|
|
Thread Tools | Search this Thread |
|
|
#1 |
|
Hi There,
Does any one know any good place(Books ref websites) to find test vectors that would cover all corner cases for addition substraction Mutiplication of 2's complement numbers(I am looking for 32 bits)But just specification of corner cases in any other bit range is also good. Thanks Kamlesh Kamlesh |
|
|