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Job Posting: EDA Compilers, Santa Clara, CA, USA

 
 
hr@tharas.com
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      04-06-2005
Software Engineer - EDA Compilers

We are looking for a innovative problem solver with experience in
developing Analyzers, and Elaborators for Verilog and VHDL. You will
apply these techniques to a parallel hardware description language
(Verilog/VHDL) Compiler that targets a special purpose VLIW
architecture for simulation.

Requirements:

o MS CS or equivalent with 3-6+ years experience

o Experience in multi-person, large software project teams

o Software Development experience in a Unix/C++ Environment

o Experience in developing Mixed Language Elaborators

Preferred Experience:

o Knowledge of HDL Semantics and Simulation Algorithms

o Experience with AST/IR Transforms

Job Location: Santa Clara, California, USA

Submit your resumes in plain text to: http://www.velocityreviews.com/forums/(E-Mail Removed)

http://www.tharas.com

Tharas Systems Inc.,
2518 Mission College Blvd, Suite 101, Santa Clara, CA 95054

 
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