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VHDL - PSL stmts embedded in VHDL: how to do functional coverage w/it? |
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#1 |
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Hi,
could someone post some piece of code illustrating functional coverage in PSL? I defined a PSL/SERE property but any attempt to use it in a -- psl cover <property_name> failed. Eric Eric DELAGE |
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#2 |
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Posts: n/a
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On Tue, 05 Apr 2005 18:13:00 +0200, Eric DELAGE <"eric UNDERSCORE
delage AT yahoo DOT fr"> wrote: >could someone post some piece of code illustrating functional coverage >in PSL? I defined a PSL/SERE property but any attempt to use it in a -- >psl cover <property_name> failed. First, note that the "cover" directive works on a *sequence*, not a property. Second, the cover directive was implemented rather recently in ModelSim (I think it appeared in version 6.0c, although I'm not sure) so it's possible that your version doesn't support it. -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK Tel: +44 (0)1425 471223 mail: Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. Jonathan Bromley |
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