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Hello Guys,
I had a doubt about the IBUFG and BUFG in xilinx. 1.I have connected clock from oscillator to CLKG IO of the Xilinx. In this case is it required to instantiate the IBUFG inside my code also?. 2. The DCM output is already BUFG i think and so is it required to BUFG again in my code? Thanks and regards Williams williams |
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#2 |
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Posts: n/a
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williams wrote: > Hello Guys, > I had a doubt about the IBUFG and BUFG in xilinx. > 1.I have connected clock from oscillator to CLKG IO of the Xilinx. In > this case is it required to instantiate the IBUFG inside my code > also?. Howdy Williams, I believe the tools will usually do it for you - the exception that comes to mind is differential clocks. > 2. The DCM output is already BUFG i think and so is it required to > BUFG again in my code? BUFG is another name for a global buffer. Although most of the time you'd want it on a global buffer, the output of a DCM is not "already BUFG", nor would you always want it to be. Even if it does automaticly insert a BUFG in some situations, I rarely trust that it will every time. Have fun, Marc Marc Randolph |
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#3 |
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Williams,
By default, an IBUFG & BUFG are instantiated, but if you specify something like: wire dcmclkout; // synthesis attribute clock_signal of dcmclkout is true // synthesis attribute clock_buffer of dcmclkout is none the synthesis tool will not issue a clock buffer placement. i usually instantiate IBUFG & BUFG, for safety. hope this helps. Vladislav "williams" <> wrote in message news: om... > Hello Guys, > I had a doubt about the IBUFG and BUFG in xilinx. > 1.I have connected clock from oscillator to CLKG IO of the Xilinx. In > this case is it required to instantiate the IBUFG inside my code > also?. > 2. The DCM output is already BUFG i think and so is it required to > BUFG again in my code? > > Thanks and regards > Williams Vladislav Muravin |
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