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VHDL - Showing value of loop iteration in assert statement

 
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Old 03-30-2005, 05:01 AM   #1
Default Showing value of loop iteration in assert statement


Hello all

I have this loop, but I cant work out to display the appropriate
channel to the screen when it fails..

The below example prints out the sentence as you see if (of course),
but I want the value of J. I've tried a few things, similar to when
you write values to a file, but havent been able to work it out

Thanks

Andrew

for J in 0 to 3 loop
if (exp_analog_channel(J) /= tb_channel_out(J)) then
assert false
report "Channel J failed " severity note; -- how do I get 'J' to
show value??
end if;
end loop;



dwerdna
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Old 03-30-2005, 07:45 AM   #2
arul_enggus@yahoo.com
 
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Default Re: Showing value of loop iteration in assert statement
All strings can be displayed in the report message

report "Channel"&conv_string(J)&"failed"
severity note;



arul_enggus@yahoo.com
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Old 03-30-2005, 09:34 AM   #3
Jonathan Bromley
 
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Default Re: Showing value of loop iteration in assert statement
On 29 Mar 2005 22:45:01 -0800, wrote:

>All strings can be displayed in the report message
>
>report "Channel"&conv_string(J)&"failed"
>severity note;


conv_string is not standard; it's nicer to use the built-in
function 'IMAGE that comes with every scalar data type:

report "channel " & integer'IMAGE(J) & " failed"
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
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Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
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The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.


Jonathan Bromley
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Old 03-31-2005, 06:30 AM   #4
dwerdna
 
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Default Re: Showing value of loop iteration in assert statement
Thanks! I'll give it a go

Andrew



dwerdna
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Old 03-31-2005, 06:31 AM   #5
Jerry
 
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Default Re: Showing value of loop iteration in assert statement
report "Channel" & integer'image(J) & failed";

"dwerdna" <> wrote in message
news: ps.com...
> Hello all
>
> I have this loop, but I cant work out to display the appropriate
> channel to the screen when it fails..
>
> The below example prints out the sentence as you see if (of course),
> but I want the value of J. I've tried a few things, similar to when
> you write values to a file, but havent been able to work it out
>
> Thanks
>
> Andrew
>
> for J in 0 to 3 loop
> if (exp_analog_channel(J) /= tb_channel_out(J)) then
> assert false
> report "Channel J failed " severity note; -- how do I get 'J' to
> show value??
> end if;
> end loop;
>





Jerry
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Old 03-31-2005, 06:23 PM   #6
Ajeetha
 
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Default Re: Showing value of loop iteration in assert statement
Just to add to it: Just in case your data type is different from a
scalar type, then 'image is not defined in VHDL-93. Ben has developed a
IMAGE pkg that can handle most of the cases, take a look at
http://www.vhdlcohen.com --> Models

HTH
Aji
http://www.noveldv.com



Ajeetha
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