Division of an integer by a real number using VHDL

Hi,

Is there a way to divide an integer by a real number(decimal number).

Can we simply use the operator '/' as follows:
eg: a <= 1234/ 1.36;
where we define 'a' as an integer.

Are there any specific libraries to be included for such a VHDL design
file.

If so, should these libraries be included in a particular order?

Thankyou

genlock

Can you give us a hint? If this is for a testbench then you
can easily do the division using varaibles. If this is hardware
then we need to know how fast and how big the vectors are.
Lookup tables are fast if the numbers are small.

Brad Smallridge

This is not for a testbench.

Its for hardware which has to be implemented on a FPGA.

This division is a part of another code

I am basically trying to divide a 24 bit vector by 1.36.(output result
eventually being a bit vector)

I am first converting this 24 bit vector to an integer.

Was wondering if we can simply use the operator '/' for then dividing
the integer by 1.36.

Does the '/' operator need specific IEEE libraries to be included in
the design file.

If so, is there any particular order?

Thankyou.

genlock

Are you assuming the imput vector is going to be a multiple of 1.36?

dutchgoldtony

That's tough. More like microprocessor work than FPGA.
Can't help you but I do know that there is no / operator in
VHDL that will do it on "real" signals. I suggest you do a
Google search on Xilinx (or whatever you are using) and
division and see what pops up. Perhaps other people in this
comp.fpga group can be more help.

b r a d @ a i v i s i o n . c o m

Brad Smallridge

>I am basically trying to divide a 24 bit vector by 1.36.(output result
>eventually being a bit vector)

One trick is to multiply by the inverse.

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Hal Murray

genlock wrote:


> I am basically trying to divide a 24 bit vector by 1.36.(output result
> eventually being a bit vector)

Don't divide by 1.36, but multiply by 1/1.36. Multiplication is much easier.

Am I right, that you have a constant factor? Then multiplication is very
easy. It becomes only a series of additions (and shifts).

The fractional number should not be used in floating point format but in
fixed point format with the accuracy you need. Remember that within some
bounds of accuracy a number can be given with:
2^n + ... + 2^1 + 2^0 + 2^(-1) + 2^(-2) + ... + 2^(-m)

Then your problem is nothing more than normal integer multiplication by
a constant value, which can be greatly optimized using even the normal
"*" Operator.


> I am first converting this 24 bit vector to an integer.

No. A vector is much better (signed or unsigned is suitable). Extend
this vector by some zeros to the left to have a fractional part.
Use a constant with the same bitwidth (also signed or unsigned),
representing 1/1.36 with your desired accuracy using the above mentioned
fixed point scheme.



Addition: This multiplication will be represented by several additions.
Pipelining is possible, if needed for speed or lower area.

Ralf

Ralf Hildebrandt

HI Ralf,

> Extend this vector by some zeros to the left to have a fractional
part.

Suppose y is the integer variable which can be represented in 8 bit
as <8.0> format, and 1/1.36 = 0.73529 is represented in 16 bits as
<1.15> format. Then under such conditions multiplication can be done
between unsymmetrical formats i.e. format of <8.0> * <1.15> gives
<9.15>. I think there is no need to pad the integer to represent
fractional part. Correct me if I am going wrong.

Thanks a lot.

-- Mohammed A Khader.

Mohammed A khader

Mohammed A khader wrote:


>>Extend this vector by some zeros to the left to have a fractional
>> part.
>
> Suppose y is the integer variable which can be represented in 8 bit
> as <8.0> format, and 1/1.36 = 0.73529 is represented in 16 bits as
> <1.15> format. Then under such conditions multiplication can be done
> between unsymmetrical formats i.e. format of <8.0> * <1.15> gives
> <9.15>. I think there is no need to pad the integer to represent
> fractional part. Correct me if I am going wrong.

Do you mean

result <= integer_signal * unsigned_constant;

while unsigned_constant is in <9.15> format? Well - seems to be a good
option (I have no simulator at hand to check ist). I was thinking of
something like

result <= unsigned_signal * unsigned_constant;

and there adding a (zero) fractional part is nessecary. But your
solution seems to be more elegant.

Ralf

Ralf Hildebrandt

Hi Ralf,

I mean result <= unsigned_signal * unsigned_constant;

but no need to adjust the fixed point as it is needed in addition.
'unsigned_signal' should'nt be of same format as 'unsigned_constant'.

Even in ieee.numeric_std standard, ' * ' fucntion is defined to
handle
unsymetrical input vectors.

For result <= integer_signal * unsigned_constant;

if ' integer_signal' is defined with appropriate range limits then it
is equivalent to the other.

-- Mohammed A Khader.

Mohammed A khader