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Hello,

I'm currently designing à Reed-Solomon decoder and I need to implement
a Galois multiplier optimized for area..

Now it takes 50 Logic Elements on Cyclone Altera and for the
Berlekamp-Massey alogorithm I need 6 t + 2 multiplier (t=16) so I need
4900 Logic Elements only for the multiplier !!!

Do you know if there is a good paper for optimized area on altera
target ?

My VHDL model have 64 AND and a few XOR !!!

Thanks for good ideas...

google might be a good place to start.

Patrick wrote:
> My VHDL model have 64 AND and a few XOR !!!

How big (# bits) are your Galois elements?

Regards,

Pieter Hulshoff