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VHDL - Re: Creating a pyramid of shift registers |
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#1 |
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Moti wrote:
> Thanks Falk and Nicolas, > > the NxN array seems like a good idea - I was just looking for some more > elegant > solution (like a special generate) for the code to be more readable.. > But it looks like I have no choise. You always have a choice. For recursive hardware structures, choose confluence: - component pyramid +count +in -out is - if width in == 0 - out = '' - else - out = {pyramid (count + 1) ('msbs' in) $} '++' - {regs 1 count ('lsb' in) $} - end - end http://www.confluent.org/ -Tom tom |
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#2 |
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> You always have a choice. For recursive hardware structures, choose
> confluence: > > - component pyramid +count +in -out is > - if width in == 0 > - out = '' > - else > - out = {pyramid (count + 1) ('msbs' in) $} '++' > - {regs 1 count ('lsb' in) $} > - end > - end > > http://www.confluent.org/ > > -Tom It's never too late to learn a new language Thanks for the tip, but I think that VHDL will have to do (for now).. Moti. Moti |
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#3 |
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Moti wrote:
>>You always have a choice. For recursive hardware structures, choose >>confluence: >> >>- component pyramid +count +in -out is >>- if width in == 0 >>- out = '' >>- else >>- out = {pyramid (count + 1) ('msbs' in) $} '++' >>- {regs 1 count ('lsb' in) $} >>- end >>- end >> >>http://www.confluent.org/ >> >>-Tom > > > It's never too late to learn a new language > Thanks for the tip, but I think that VHDL will have to do (for now).. > Moti. > You can also do recursive hardware in VHDL. Although it's not as small as confluence. Göran =?ISO-8859-1?Q?G=F6ran_Bilski?= |
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#4 |
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Why not use Confluence to generate your low level components, then
instantiate them into your higher-level designs? (Note: Confluence 0.9.3 is the latest version with support for VHDL. 0.10.0 is Verilog-only at this point. VHDL will be back on-board with 0.10.1.) -Tom tom |
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#5 |
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Göran wrote:
>> It's never too late to learn a new language >> Thanks for the tip, but I think that VHDL will have to do (for now).. >> Moti. > > You can also do recursive hardware in VHDL. > Although it's not as small as confluence. > > Göran Yes, but VHDL lacks higher-order datatypes. Try passing an entity/architecture pair into an instance of another through a generic port. What is this good for? Imagine a generic binary tree component that accepts a binary operation as an input. The same recursive component can assemble a tree of XOR gates, tree of adders, or a tree of multiplexors. In Confluence, you can pull this off: {tree ('+') unify vector_list summation_result} -Tom tom |
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#6 |
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tom wrote:
> Göran wrote: > >>>It's never too late to learn a new language >>>Thanks for the tip, but I think that VHDL will have to do (for > > now).. > >>>Moti. >> >>You can also do recursive hardware in VHDL. >>Although it's not as small as confluence. >> >>Göran > > > Yes, but VHDL lacks higher-order datatypes. Try passing an > entity/architecture pair into an instance of another through a generic > port. > > What is this good for? Imagine a generic binary tree component that > accepts a binary operation as an input. The same recursive component > can assemble a tree of XOR gates, tree of adders, or a tree of > multiplexors. In Confluence, you can pull this off: > {tree ('+') unify vector_list summation_result} > > > -Tom > Yes, That is something I miss from VHDL. It would have been good if VHDL had taken more from ADA on the generic functionality. Göran =?ISO-8859-1?Q?G=F6ran_Bilski?= |
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