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A happy new year to all !

Hi, I'm trying to do a simple binart count output to a bunch of leds and
running into problems. I am using the Xilinx XC2-XL board, and
programming the XC9572-XL chip. I have attached to this a group of 4 leds
(through a 74HC373). The problem is that instead of a binary output on
the leds I just get random patterns. I have verified that the latch is
correctly being held high for the 373.

I am sure that the leds are correctly wired up, because when I just
output set values to them, they light in the correct binary pattern.

- Do a binary count on the LEDS on the DIO4 Board
-- using XC9572, and a clock input.
-- This is setup for a 1.8MHz clock.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity LedCount is
Port(
Clock : in std_logic;
Latch : out std_logic;
Leds : out std_logic_vector(7 downto 0);
OBLed : out std_logic
);
end LedCount;

architecture Behavioral of LedCount is
signal Count : std_logic_vector(19 downto 0);
signal LedCount : std_logic_vector(7 downto 0) := x"00";

begin
Latch <= '1';
A: Process(Clock)
begin
if Clock='1' and clock'event then
Count <= Count+1;
end if;
end process;


B: Process(Count)
begin
OBLed <= Count(19);
if (Count = x"FFFFF") then
LedCount <= LedCount + 1;
Leds <= LedCount;
end if;
end process;
end Behavioral;


If anyone can see anything obviously wrong with this I would be most
greatfull.

Also does anyone know any newbie (new to VHDL, I've been doing
electronics and programming for several years now ), guides for VHDL,
especially ones aimed towards the Xilinx chips/toolset.

Cheers.

Phill.

Prime wrote:

> A: Process(Clock)
> begin
> if Clock='1' and clock'event then
> Count <= Count+1;
> end if;
> end process;

No reset for signal Count?


> B: Process(Count)
> begin
> OBLed <= Count(19);
> if (Count = x"FFFFF") then
> LedCount <= LedCount + 1;
> Leds <= LedCount;
> end if;
> end process;

Again: No reset for LedCount and Leds?

Furthermore you can move the line
OBLed <= Count(19);
out of this process. But this should not change the behavior.

A real problem is the fact, that LedCount and Leds are latches. New
values are assigned to them all the time if (Count = x"FFFFF").
Especially the line
LedCount <= LedCount + 1;
makes trouble, as this is an infinite loop. ("LedCount + 1" is computed
and assigned to LedCount and "LedCount + 1" is computed and assigned ...
and so on) Because of your sensitivity list this infinite loop is
invisible during simlation. During simulation the process is triggered
only once, if Count changes, but in hardware this latch is updated in
the described infinite loop and this is exactly what you see: "random
results", as propagation time of the adder and latch for LedCount decide
how many loops are done until signal Count changes and disables the latch.
Solution: LedCount has to be described as a flipflop (clocked by signal
Clock or by a bit of signal Count).

Ralf

Hang a clock event around your B process,
put clk in your sensitivity list,
and it should run fine:

B: Process(clk)
begin
if( clk'event and clk='1') then
OBLed <= Count(19);
if (Count = x"FFFFF") then
LedCount <= LedCount + 1;
Leds <= LedCount;
end if;
end if;
end process;

b r a d @ a i v i s i o n . c o m