Different logic?

Please see the processes below. Are they equivalent in logic? If not, why not?
The synthesis tool is giving me different interpretations. Thank you very much!

Process #1:
P_WR_EN : process (TCM_NR_INS)
begin
if (TCM_NR_INS = "11111") then
RAM_WR_EN <= '0';
elsif (TCM_NR_INS(1 downto 0) /= "00") then
RAM_WR_EN <= '0';
else
RAM_WR_EN <= '1';
end if;
end process P_WR_EN;

Process #2:
P_WR_EN : process (TCM_NR_INS)
begin
if (TCM_NR_INS /= "11111") then
if (TCM_NR_INS(1 downto 0) = "00") then
RAM_WR_EN <= '1';
else
RAM_WR_EN <= '0';
end if;
else
RAM_WR_EN <= '0';
end if;
end process P_WR_EN;

- Paulo Valentim

Paulo Valentim

Consider running a simulation to verify that
the descriptions are equivalent.

-- Mike Treseler

mike_treseler

Paulo Valentim wrote:
> Please see the processes below. Are they equivalent in logic? If not, why
> not? The synthesis tool is giving me different interpretations. Thank you
> very much!

Logically, they seem similar. If you use multi level logic though (including
'Z', 'H', 'L', etc.) they will not behave 100% the same. I'm sure synthesis
will come up with different circuits, but it's likely that formal
verification would show these two as equivalent.

Regards,

Pieter Hulshoff

Pieter Hulshoff