Sorry , if i sound rude, but this is just another posting where you

have cut and paste the entire Project details and asking for

solutions.

If I am not wrong this is probably another "indian female" posting it

who has taken this Computer Architecture course thinking it mite bost

her GPA but now struggling with it...

PLease do not post ur homeworks,

Thanx

(E-Mail Removed) (sirisha) wrote in message news:<(E-Mail Removed). com>...

> Arithmetic operations are among the most basic instructions in

> microprocessors and many other ASICs. From SPECfp2000 benchmark, about

> 15% of the floating-point ALU operations are additions and about 10%

> are subtractions. The most time consuming arithmetic operation is the

> floating-point division, then comes to the multiplication and then the

> addition/subtraction. The speed of those arithmetic operations

> directly links to the overall performance of the ALU units and so the

> computers. Since floating-point addition/subtraction units are built

> on top of integer addition/subtraction units, performance of integer

> addition/subtraction units have direct link to performance of

> floating-point units.

>

> In this class project, we design 2 32-bit addition/subtraction units,

> one uses straight simple ripple-carry algorithm and the other uses

> carry-looked-ahead algorithm. Our study will basically explore the

> correlations between areas, speeds, algorithms and will at least cover

> the information as listed below. All analyses will be performed based

> on both theory and measurements and explanation will be provided for

> discrepancies between the twos.

> ƒ 1)Correlation of areas and speeds for both algorithms will be

> determined

> 2)The two designs will be optimized for areas and analysis on speeds

> will be performed

> 3)The two designs will be optimized for speeds and analysis on areas

> will be performed

> 4)Costs and speeds of a 32-bit floating-point unit if the unit is

> built based on one addition/subtraction algorithm versus the other

> will be relatively evaluated

>

> This project start with verilog code. I am unable to start the

> code.I need help from group.

>

> Thanks

> sirisha.