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VHDL - Detecting of 'U' in a std_logic_vector |
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#1 |
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Hello,
I have to convert a std_logic_vector in an integer. This is generally no matter. But I want to threat vectors in a special way which have 'U's or 'X'. How can I detect whether a vector only contains '0's and '1's. Bye Tom Thomas Reinemann |
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#2 |
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Thomas Reinemann a écrit:
> Hello, > > I have to convert a std_logic_vector in an integer. This is generally no > matter. But I want to threat vectors in a special way which have 'U's or > 'X'. How can I detect whether a vector only contains '0's and '1's. Hi Xor all the bits together (parity check), then pass the result through the to_x01 function, which will return 'X' for 'U' or 'X' input. Result should be 0 or 1 if your vector contains only 0s and 1s, or X if not. Something like if to_x01(xor_reduce(your_vector)) = 'X' then ... (xor_reduce function code has been posted here a few weeks ago) -- ____ _ __ ___ | _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le - | | | | | (_| |_| | Invalid return address: remove the - |_| |_|_|\__|\___/ Nicolas Matringe |
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#3 |
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On Thu, 28 Oct 2004 15:19:36 +0200, Nicolas Matringe
<> wrote: >Thomas Reinemann a écrit: >> Hello, >> >> I have to convert a std_logic_vector in an integer. This is generally no >> matter. But I want to threat vectors in a special way which have 'U's or >> 'X'. How can I detect whether a vector only contains '0's and '1's. > >Hi >Xor all the bits together (parity check), then pass the result through >the to_x01 function, which will return 'X' for 'U' or 'X' input. Result >should be 0 or 1 if your vector contains only 0s and 1s, or X if not. > >Something like > if to_x01(xor_reduce(your_vector)) = 'X' then > ... > >(xor_reduce function code has been posted here a few weeks ago) std_logic_1164 contains these functions: FUNCTION Is_X ( s : std_ulogic_vector ) RETURN BOOLEAN; FUNCTION Is_X ( s : std_logic_vector ) RETURN BOOLEAN; FUNCTION Is_X ( s : std_ulogic ) RETURN BOOLEAN; if is_x(your_vector) then .... is much cleaner Regards, Allan Allan Herriman |
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#4 |
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Allan Herriman a écrit:
> std_logic_1164 contains these functions: > > FUNCTION Is_X ( s : std_ulogic_vector ) RETURN BOOLEAN; > FUNCTION Is_X ( s : std_logic_vector ) RETURN BOOLEAN; > FUNCTION Is_X ( s : std_ulogic ) RETURN BOOLEAN; > > > if is_x(your_vector) then > > ... is much cleaner Didn't know that. It sure is much cleaner. -- ____ _ __ ___ | _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le - | | | | | (_| |_| | Invalid return address: remove the - |_| |_|_|\__|\___/ Nicolas Matringe |
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#5 |
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On Wed, 03 Nov 2004 08:55:36 +0100, Nicolas Matringe
<> wrote: >Allan Herriman a écrit: > >> std_logic_1164 contains these functions: >> >> FUNCTION Is_X ( s : std_ulogic_vector ) RETURN BOOLEAN; >> FUNCTION Is_X ( s : std_logic_vector ) RETURN BOOLEAN; >> FUNCTION Is_X ( s : std_ulogic ) RETURN BOOLEAN; >> >> >> if is_x(your_vector) then >> >> ... is much cleaner > >Didn't know that. It sure is much cleaner. Faster as well. Regards, Allan Allan Herriman |
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