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Hi everyone, I´m trying to find some tutorial for implement a table in
VHDL. This is my intention: - I have a 8x8 table made in Matlab - Depending of two inputs, which can go from 1 to 8, - I need to have at the output the corresponding value of the mentioned table. What´s the simpliest way to do it? I have heard something about Look up Tables (LUT), but I don´t know if this is the better solution... and if it is, can someone give me a basic paper? Thanks a lot, and sorry for my poor english! Thanks a lot eneko |
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#2 |
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eneko wrote:
> - I have a 8x8 table made in Matlab > - Depending of two inputs, which can go from 1 to 8, > - I need to have at the output the corresponding value of the mentioned > table. Consider an array of 8 bit vectors. > > What´s the simpliest way to do it? I have heard something about Look up > Tables (LUT), Thats a device primitive, not a VHDL type. -- Mike Treseler Mike Treseler |
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#3 |
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thanks Mike, but:
How I implement this table, whith an if estructure? case? I thought it was a better way to do it, and, what do you say whith "device primitive"? sorry but I don´t understand you. Thanks one more time. eneko |
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#4 |
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eneko wrote:
> > Hi everyone, I´m trying to find some tutorial for implement a table in > VHDL. This is my intention: > > - I have a 8x8 table made in Matlab > - Depending of two inputs, which can go from 1 to 8, > - I need to have at the output the corresponding value of the mentioned > table. > > What´s the simpliest way to do it? I have heard something about Look up > Tables (LUT), but I don´t know if this is the better solution... and if it > is, can someone give me a basic paper? > > Thanks a lot, and sorry for my poor english! You did not say what your data is in the table. But a simple array of 63 downto 0 will do the job if you append the two indicies into one index. You also did not say what the indicies are. Do you know the source of the indicies? Will they be slv or integers? -- Rick "rickman" Collins Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX rickman |
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#5 |
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Thanks for all, finally I think I will use a bidimensional array for my
purposes, in this way (with 4 positions): type table is array (1 to 4, 1 to 4) of integer; signal table1:table; Then I fill the gaps in this way: table1<=((1,2,3,4),(4,3,2,1),(1,1,1,1),(2,2,2,2)); And if I want something from this table: number<=table1(2,3) and will return number 2. I will hope this can be useful for other beginner like me. Thanks for all !! eneko |
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#6 |
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> Thanks for all, finally I think I will use a bidimensional array for my > purposes, in this way (with 4 positions): This may not work for some synthesis tools. Synopsys DC didn't support more-dimensional arrays for a long time (I think it does now with the Presto version, not sure). The work-around is to use an array of an array instead, which works with pretty much all major synthesis tools. Eg. type t_IntArray is array(7 downto 0) of integer; type t_IntArrayArray is array(7 downto 0) of t_IntArray; signal myIntAA : t_IntArrayArray. .... element <= myIntAA(index1)(index2); (instead of: element <= myIntAA(index1, index); Note that using an integer will create 32 FF's per element. If you want to synthesize this later on, you may want to restrict the range of the integer... Tom Tom Verbeure |
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#7 |
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"eneko" <> wrote:
> - I have a 8x8 table made in Matlab > - Depending of two inputs, which can go from 1 to 8, > - I need to have at the output the corresponding value of the mentioned > table. > > What´s the simpliest way to do it? I have heard something about Look up > Tables (LUT), but I don´t know if this is the better solution... and if it > is, can someone give me a basic paper? Use some constants (like the std_logic definition). For one input you need one table eg: type sig is array 3 downto 0 of std_logic_vector(1 downto 0); constant SIG<=("00","01","10","11"); output_vector<=SIG(2) For two dimensions I would use more tables to ensure the synthesis tool could manage the code and build a maintype as array of tables. bye Thomas Thomas Stanka |
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#8 |
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I will change it,
Thanks for all!! eneko |
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