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SRAM gate count for ASIC technology

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I have to optimize RTL design for ASIC technology.
Especially many registers should be stored in sync. SRAM than in real Flipflops.

Does anyone know how large is e.g. 1kByte SRAM for
an up-to-date ASIC technology TSMC or UMC?
(Equivalent gate count or mm2)

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