Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > Strange input arrival times?

Reply
Thread Tools

Strange input arrival times?

 
 
Mike
Guest
Posts: n/a
 
      10-02-2004
I have the following line inside one of my processes:

if ADDR_BUS(31 downto 6) = DEVICE_ADDRESS(31 downto 6) and DATA_BUS =
DEVICE_DATA then

When I synthesize my code with ISE, it reports:

Minimum input arrival time before clock: 6.568ns


When I change the line to:

if ADDR_BUS(31 downto 6) = DEVICE_ADDRESS(31 downto 6) then

The synthesis reports:

Minimum input arrival time before clock: 6.971ns


So how come the second code example has a higher input arrival time, than
the first code example? Surely the second example needs to do less than the
first example, which I would have thought would reduce the input arrival
time.

Can anyone shed any light on this?

Thanks.





 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
Re: CHRIST: THE ARRIVAL Gordon Beaton Java 2 12-26-2005 03:43 PM
Thunderbird .8 Mail folder showing new arrival Dan C Firefox 3 12-06-2004 11:45 PM
Lie to Netflix about your DVD arrival dates! Gunter Gilliott DVD Video 8 07-08-2004 02:07 AM
Canon 300D - dead on arrival :( Steve Reeves Digital Photography 16 11-01-2003 05:36 AM
E-mails not in bold on arrival Barry Verona Computer Support 7 08-11-2003 03:51 AM



Advertisments