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I'm trying to use the i2c-core from opencores.org.
I made a project in Altera Quartus II and added the 3 files.
Compiling is no problem, but I have problems with the simulation. I'm doing:
1) reseting the core
2) write clock prescaler (Addr 0 and 1)
3) enable core in control register (10000000 to Addr 2)
4) write data for writing to slave to transmit register (Addr 3)
5) start and write to command register (10010000 to Addr 4)
and nothing happens on the output-lines !!!???
Reading the status register (Addr 4) shows 'Transfer in Progress' every
time!
What i am doing wrong ???
Can someone help ?
Thanks, Manfred

"Manfred Balik" <> writes:

> I'm trying to use the i2c-core from opencores.org.
> I made a project in Altera Quartus II and added the 3 files.
> Compiling is no problem, but I have problems with the simulation. I'm doing:
> 1) reseting the core
> 2) write clock prescaler (Addr 0 and 1)
> 3) enable core in control register (10000000 to Addr 2)
> 4) write data for writing to slave to transmit register (Addr 3)
> 5) start and write to command register (10010000 to Addr 4)
> and nothing happens on the output-lines !!!???

Absolutely nothing at all?
> Reading the status register (Addr 4) shows 'Transfer in Progress' every
> time!
> What i am doing wrong ???

Have you wired up the open-drain drivers and a pull-up resistor?

Just my quick thoughts - post more detail for a more detailed answer -
maybe post your testbench code?

Cheers,
Martin

--

TRW Conekt, Solihull, UK
http://www.trw.com/conekt

[Phillip]

Yes I know that opencores has a good FPGA core for free. For an I2C core that only requires on master though the following simplified core can save a lot in real estate:

http://skytek.x10.mx/i2c/skytekcontact.htm

Very low cost ($65.00) and no per use royalties