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I am confused howto make use of procedures. It was my understanding
that i could use wait statements within the body of procedure. Yet my vhdl code is not being synthesized. Can someone help me with this ? or give good online reference/tutorial concerning procedures ? With regards, Michel Bieleveld. architecture RTL of ax88796 is .. Procedure AX_write (AX_reg : in std_logic_vector(9 downto 0); AX_data : in std_logic_vector(15 downto 0)) is begin Write_ax_loop : loop .. wait until CLK'EVENT and CLK = '1'; exit Write_ax_loop when nRST = '0'; .. end loop; end AX_Write; COMB_PROC: process (CState,Div2ms) begin .. AX_Write(reg_dcr,init_dcr); .. end process; end RTL; Michel Bieleveld |
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#2 |
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Michel Bieleveld a écrit:
> I am confused howto make use of procedures. It was my understanding > that i could use wait statements within the body of procedure. Yet my > vhdl code is not being synthesized. Can someone help me with this ? or > give good online reference/tutorial concerning procedures ? You cannot call a procedure with wait statements from within a process with a sensitivity list. -- ____ _ __ ___ | _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le - | | | | | (_| |_| | Invalid return address: remove the - |_| |_|_|\__|\___/ Nicolas Matringe |
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#3 |
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Hmm since i was planning on calling the procedure within my
statemachine I think I have a problem. What I want is to make a macro?/procedure to easily write values to a registe, do you have any suggestions to solve my problem ? How do people generally solve this problem , synchronizing the main state machine with a write register state machine ? On Thu, 12 Aug 2004 14:21:12 +0200, Nicolas Matringe <> wrote: >Michel Bieleveld a écrit: >> I am confused howto make use of procedures. It was my understanding >> that i could use wait statements within the body of procedure. Yet my >> vhdl code is not being synthesized. Can someone help me with this ? or >> give good online reference/tutorial concerning procedures ? > >You cannot call a procedure with wait statements from within a process >with a sensitivity list. Michel Bieleveld |
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#4 |
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Michel Bieleveld a écrit:
> Hmm since i was planning on calling the procedure within my > statemachine I think I have a problem. What I want is to make a > macro?/procedure to easily write values to a registe, do you have any > suggestions to solve my problem ? > > How do people generally solve this problem , synchronizing the main > state machine with a write register state machine ? I never use procedures in synthesizable code. Synchronization of state machines is usually done with signals... I don't understand what you're trying to do so I can't help you any further -- ____ _ __ ___ | _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le - | | | | | (_| |_| | Invalid return address: remove the - |_| |_|_|\__|\___/ Nicolas Matringe |
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#5 |
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I am trying to improve my coding, what i have till so far is working
nicely. BUT since i need to initialize around 10 registers this would mean i have to write down 10 * 2 states (like Boot4/Boot5 and Boot6/Boot7). So now i am confused how to make the code more compact, and more elegant. ( Like using a procedure) COMB_PROC: process (CState,Div2ms,AX_Write_Ready,SD_OE) begin nCS <= '0'; nBHE <= '0'; case CState is when Boot1 => AX_Write <= '0'; RESET <= '0'; Div2msReset <= '1'; NState <= Boot2; when Boot2 => AX_Write <= '0'; RESET <= '1'; Div2msReset <= '0'; if ( Div2ms = '1') then NState <= Boot3; end if; when Boot3 => AX_Write <= '0'; RESET <= '0'; Nstate <= Boot4; when Boot4 => SA <= reg_dcr; SD_out <= init_dcr; SD_OE <= '1'; AX_Write <= '1'; Nstate <= Boot5; when Boot5 => AX_Write <= '0'; if (AX_Write_Ready ='1') then SD_OE <= '0'; NState <= Boot6; else SA <= reg_dcr; SD_out <= init_dcr; SD_OE <= '1'; end if; when Boot6 => SA <= reg_rbcr0; SD_out <= init_rbcr0; SD_OE <= '1'; AX_Write <= '1'; NState <= Boot7; when Boot7 => AX_Write <='0'; if (AX_Write_Ready ='1') then SD_OE <= '0'; NState <= Boot8; else SA <= reg_rbcr0; SD_out <= init_rbcr0; SD_OE <= '1'; end if; when Boot8 => end case; end process; WRITE_AX: process(CStateW,AX_Write) begin case CStateW is when Write0 => nIOWR <= '1'; if (AX_Write='1') then AX_Write_Ready<= '0'; NStateW <= Write1; else AX_Write_Ready<= '1'; end if; when Write1 => nIOWR <= '0'; AX_Write_Ready<= '0'; NStateW <= Write2; when Write2 => nIOWR <= '0'; AX_Write_Ready<= '0'; NstateW <= Write3; when Write3 => nIOWR <= '0'; AX_Write_Ready<= '0'; NstateW <= Write4; when Write4 => nIOWR <= '0'; AX_Write_Ready<= '0'; NstateW <= Write5; when Write5 => nIOWR <= '0'; AX_Write_Ready<= '0'; NStateW <= Write6; when Write6 => AX_Write_Ready<= '0'; nIOWR <= '1'; NstateW <= Write7; when Write7 => AX_Write_Ready<= '0'; nIOWR <= '1'; NstateW <= Write8; when Write8 => AX_Write_Ready<= '0'; nIOWR <= '1'; NStateW <= Write9; when Write9 => AX_Write_Ready<= '0'; nIOWR <= '1'; NstateW <= Write10; when Write10 => AX_Write_Ready<= '0'; nIOWR <= '1'; NStateW <= Write11; when Write11 => AX_Write_Ready<= '0'; nIOWR <= '1'; NstateW <= Write12; when Write12 => AX_Write_Ready <= '0'; nIOWR <= '1'; NStateW <= Write13; when Write13 => AX_Write_Ready<= '0'; nIOWR <= '1'; NStateW <= Write0; end case; end process; end RTL; On Thu, 12 Aug 2004 15:49:59 +0200, Nicolas Matringe <> wrote: >Michel Bieleveld a écrit: >> Hmm since i was planning on calling the procedure within my >> statemachine I think I have a problem. What I want is to make a >> macro?/procedure to easily write values to a registe, do you have any >> suggestions to solve my problem ? >> >> How do people generally solve this problem , synchronizing the main >> state machine with a write register state machine ? > >I never use procedures in synthesizable code. >Synchronization of state machines is usually done with signals... >I don't understand what you're trying to do so I can't help you any further Michel Bieleveld |
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#6 |
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Michel Bieleveld wrote:
> I am confused howto make use of procedures. It was my understanding > that i could use wait statements within the body of procedure. Waits are not allowed for synthesis. See: http://groups.google.com/groups?q=vh...cedure+lapenta -- Mike Treseler Mike Treseler |
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#7 |
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Posts: n/a
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Michel Bieleveld wrote:
> I am trying to improve my coding, what i have till so far is working > nicely. BUT since i need to initialize around 10 registers this would > mean i have to write down 10 * 2 states (like Boot4/Boot5 and > Boot6/Boot7). So now i am confused how to make the code more compact, > and more elegant. ( Like using a procedure) The code looks a tad scary ... 2 asynchronous state machines that send information back and forth will often give interesting results in the field. How about giving us the original problem you're trying to solve to see if we can help you with it? Regards, Pieter Hulshoff Pieter Hulshoff |
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#8 |
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Yes I thought the code looked scary too
state machines are well synchronized. However I would love to see some clean code. So here is my problem: I am communicating with another chip. To setup the other chip I need to make a reset signal of 20ms and then set some registers. For the communication I need to make a /IOWR pin low for 60ns and high for at least 100ns. My result were the two main processes listed in my previous post. I have no idea to make it more beautiful and would love to hear some suggestions of how my betters are doing this With regards, Michel. On Thu, 12 Aug 2004 21:31:04 +0200, Pieter Hulshoff <> wrote: >Michel Bieleveld wrote: > >> I am trying to improve my coding, what i have till so far is working >> nicely. BUT since i need to initialize around 10 registers this would >> mean i have to write down 10 * 2 states (like Boot4/Boot5 and >> Boot6/Boot7). So now i am confused how to make the code more compact, >> and more elegant. ( Like using a procedure) > >The code looks a tad scary ... 2 asynchronous state machines that send >information back and forth will often give interesting results in the >field. How about giving us the original problem you're trying to solve to >see if we can help you with it? > >Regards, > >Pieter Hulshoff Michel Bieleveld |
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#9 |
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"Michel Bieleveld" <> wrote in message news:... > Yes I thought the code looked scary too > state machines are well synchronized. However I would love to see some > clean code. > > So here is my problem: > > I am communicating with another chip. To setup the other chip I need > to make a reset signal of 20ms and then set some registers. > > For the communication I need to make a /IOWR pin low for 60ns and high > for at least 100ns. My result were the two main processes listed in my > previous post. > > I have no idea to make it more beautiful and would love to hear some > suggestions of how my betters are doing this > > With regards, > > Michel. > > > On Thu, 12 Aug 2004 21:31:04 +0200, Pieter Hulshoff > <> wrote: > > >Michel Bieleveld wrote: > > > >> I am trying to improve my coding, what i have till so far is working > >> nicely. BUT since i need to initialize around 10 registers this would > >> mean i have to write down 10 * 2 states (like Boot4/Boot5 and > >> Boot6/Boot7). So now i am confused how to make the code more compact, > >> and more elegant. ( Like using a procedure) > > > >The code looks a tad scary ... 2 asynchronous state machines that send > >information back and forth will often give interesting results in the > >field. How about giving us the original problem you're trying to solve to > >see if we can help you with it? > > > >Regards, > > > >Pieter Hulshoff > What I usually do is to use 2 state machines; one FSM takes care of transferring the data to the external chip, the other (higher level) FSM takes of what data should be sent. Both communiciate with each other with signals. The interface to the lower level FSM is for example data:std_logic_vector(7 downto 0); start_write:std_logic; write_done:std_logic; The first FSM waits for 'start_write' to become '1' and starts the transfer. When it's done, it sets 'write_done' to '1' and waits for 'start_write' to become '0' again and sets 'write_done' to '0'. This is a two way handshake. The higher level FSM just controls these signals. In this way almostly duplicate logic in states is removed, and has some analogy of procedures in a procedural language like C. Depending on some factors, a full two way handshake is not neccessary, and the control signals can be only one clock pulse wide. To save even further on states, you can put all the initialisation data in a big vector and use a counter to select the proper subvector. Hope this helps, Jeroen Jeroen |
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#10 |
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Michel Bieleveld wrote:
> I am communicating with another chip. To setup the other chip I need > to make a reset signal of 20ms and then set some registers. > > For the communication I need to make a /IOWR pin low for 60ns and high > for at least 100ns. My result were the two main processes listed in my > previous post. Do you have any clock available to your design to synchronize things, and to measure time with? What frequency is said clock running at? I agree with Jeroen that it would be good to have one process that communicates, and one that controls the information that needs to be communicated. Both should be clocked. I know there are people out there that have managed to get asynchronous designs working, but it's a complicated design practice. Regards, Pieter Hulshoff Pieter Hulshoff |
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