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VHDL - sinus generation

 
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Old 08-09-2004, 12:34 PM   #1
Default sinus generation


How could we generate a sinus in vhdl at a desired frequency?
I would like some clues, if someone could explain me the principles in a
simple way...

Thank you

Maiwenn



Mai
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Old 08-09-2004, 01:52 PM   #2
Jonathan Bromley
 
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Default Re: sinus generation
On Mon, 09 Aug 2004 07:34:30 -0400, "Mai" <mai@hide> wrote:

>How could we generate a sinus in vhdl at a desired frequency?
>I would like some clues, if someone could explain me the principles in a
>simple way...


We need a few more clues....

Is this for a test bench? If so, it's easy to generate a sampled
approximation to a sinusoid: run a timed process that recalculates
the sine value at frequent intervals, using the sin() function
from the IEEE.MATH_REAL package. However, this solution is
not synthesisable.

If it's for synthesis, then the best answer is strongly affected
by your specification. Common solutions...

(1) Use a phase accumulator or some other method to generate
a phase angle value that increments at the appropriate rate.
Use this phase angle as the index into a lookup table (ROM)
that contains sine values. For better accuracy or smaller
table size, consider interpolation between table points.
For a simple example, see
http://www.doulos.com/knowhow/vhdl_m...ave_generator/

(2) As above, get a phase angle value, but use the CORDIC
algorithm to determine the sine value.

(3) As above, get a phase angle value, but use a piecewise linear
approximation to the sine function. This is roughly the same
as using a very sparse lookup table with linear interpolation.

(4) Create a digital filter, with feedback, that is intentionally
unstable. It will oscillate at a predictable frequency. By
adding some trickery to reduce the loop gain to exactly 1 after
oscillation has reached the desired amplitude, you can create
a sine wave of any desired frequency or amplitude.

(5) Create a square-wave signal and pass it through a digital
low-pass filter.

The best solution for any particular purpose will depend on...
* what sort of device you have available
* what system clock frequency you have
* what output frequency you require
* the required level of precision of your sinusoid
* whether you require the frequency to be programmable

In some special situations, such as demodulators, you may be
able to get away with no sinusoid at all; by taking four
equally spaced samples of a sinusoid at angles 0, pi/2,
pi, 3*pi/2 then the sinusoid values are simply 1, -j, -1, j.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
Tel: +44 (0)1425 471223 mail:
Fax: +44 (0)1425 471573 Web: http://www.doulos.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.


Jonathan Bromley
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