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i'v coded gcd algorithm in vhdl, and i'v used the MOD operator, but i
got problems in synthesis, synthesis is ready to accept power of two
right operand with MOD operator.
any one have idea how to get over this problem?

Basel Naamna wrote:
> i'v coded gcd algorithm in vhdl, and i'v used the MOD operator, but i
> got problems in synthesis, synthesis is ready to accept power of two
> right operand with MOD operator.

That's the way it is. Mod does work for constants.
Hmm...Maybe a counter that rolls over at your
special number will do what you want.

-- Mike Treseler

In article < >,
Basel Naamna <> wrote:
>i'v coded gcd algorithm in vhdl, and i'v used the MOD operator, but i
>got problems in synthesis, synthesis is ready to accept power of two
>right operand with MOD operator.
>any one have idea how to get over this problem?

Divide and Mod operators take up all the gates in the world if you do them
all in one clock. If you can take several clock cycles for each, life
will be a lot easier.

For a mod, you slide the bigger number in from the LSB and compare after
each shift. If the contents of the shift register are >= the smaller
number, you subtract. It takes as many shifts as the number of bits you
can handle.

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