Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > Representing signed numbers in VHDL

Reply
Thread Tools

Representing signed numbers in VHDL

 
 
Kingsley Oteng
Guest
Posts: n/a
 
      05-04-2004
is their standard way to represent signed numbers in binary? I know there is
two's complement notation etc etc. but is there a general standard to do
this in binary notation or do people tend to use two's complement?

- Kingsley


 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
Convert a signed binary number into a signed one ? Rob1bureau VHDL 1 02-27-2010 12:13 AM
signed(12 downto 0) to signed (8 downto 0) kyrpa83 VHDL 1 10-17-2007 06:58 PM
VHDL-2002 vs VHDL-93 vs VHDL-87? afd VHDL 1 03-23-2007 09:33 AM
Multiply using shift, for signed numbers fastgreen2000@yahoo.com VHDL 2 09-13-2005 05:08 AM
VHDL and signed numbers salman sheikh VHDL 3 12-20-2004 05:05 PM



Advertisments