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to many FOR loops?

 
 
eismaus4
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Posts: n/a
 
      04-27-2004
Hi,
I need help with a code I have written for autocorralation.
I have added the whole code. The problem: all loops are working
exactly. But when I add the equation_counting_loop (which just says
that the inner part shoult be run three times) then the simulation
programm is not able to simulate the code. does anybody has an idea,
what could be the problem?

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;

entity SAMPLES_3 is

port ( s : in std_logic_vector(23 downto 0);

res : out std_logic_vector(47 downto 0);
res1 : out std_logic_vector(23 downto 0));
end SAMPLES_3;

architecture BEHAVE of SAMPLES_3 is

begin

process(s)
variable tt : std_logic_vector (15 downto 0);
variable var : std_logic_vector (15 downto 0);
variable sb : std_logic_vector (23 downto 0);

variable a,b : integer;
begin

a := 31;
b := 63;
tt := "0000000000000000";
var := "0000000000000000";

sb(23 downto 0) := s(23 downto 0);


equation_counting : for i in 2 downto 1 loop


adding_counting : for j in 3 downto 1 loop

what_to_add : for m in 7 downto 0 loop
a := a-1;
end loop what_to_add;

var := s(a downto (a-7)) * sb(a downto (a-7));
tt := tt + var;

end loop adding_counting;


result_place : for n in 15 downto 0 loop
b := b-1;

res(b downto (b-15)) <= tt;


sb := "00000000" & sb(23 downto ;
res1 <= sb;

end loop equation_counting;

end process;
end BEHAVE;


thank you for your help
regards
eismaus
 
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fe
Guest
Posts: n/a
 
      04-27-2004
You forgot end loop result_place;

cheers
fe


"eismaus4" <(E-Mail Removed)> wrote in message
news:(E-Mail Removed) om...
> Hi,
> I need help with a code I have written for autocorralation.
> I have added the whole code. The problem: all loops are working
> exactly. But when I add the equation_counting_loop (which just says
> that the inner part shoult be run three times) then the simulation
> programm is not able to simulate the code. does anybody has an idea,
> what could be the problem?
>
> library IEEE;
> use IEEE.std_logic_1164.all;
> use IEEE.std_logic_unsigned.all;
> use IEEE.std_logic_arith.all;
>
> entity SAMPLES_3 is
>
> port ( s : in std_logic_vector(23 downto 0);
>
> res : out std_logic_vector(47 downto 0);
> res1 : out std_logic_vector(23 downto 0));
> end SAMPLES_3;
>
> architecture BEHAVE of SAMPLES_3 is
>
> begin
>
> process(s)
> variable tt : std_logic_vector (15 downto 0);
> variable var : std_logic_vector (15 downto 0);
> variable sb : std_logic_vector (23 downto 0);
>
> variable a,b : integer;
> begin
>
> a := 31;
> b := 63;
> tt := "0000000000000000";
> var := "0000000000000000";
>
> sb(23 downto 0) := s(23 downto 0);
>
>
> equation_counting : for i in 2 downto 1 loop
>
>
> adding_counting : for j in 3 downto 1 loop
>
> what_to_add : for m in 7 downto 0 loop
> a := a-1;
> end loop what_to_add;
>
> var := s(a downto (a-7)) * sb(a downto (a-7));
> tt := tt + var;
>
> end loop adding_counting;
>
>
> result_place : for n in 15 downto 0 loop
> b := b-1;
>
> res(b downto (b-15)) <= tt;
>
>
> sb := "00000000" & sb(23 downto ;
> res1 <= sb;
>
> end loop equation_counting;
>
> end process;
> end BEHAVE;
>
>
> thank you for your help
> regards
> eismaus



 
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