hello

im a student. beginner to vhdl so bear with me

below is part of my ALU 8 bit program. currently im editing my

program so that it can detect the overflow, zero and carry-out flag.

what is the best approach to solve this let say operation (a+b) it

will detect flag carry, zero and overflow? i try to add as new

variable as below

function arith_add (operand_A, operand_B : std_logic_vector(7 downto

0))

return std_logic_vector is

variable arith_out: std_logic_vector(7 downto 0);

variable carry_in : std_logic_vector(7 downto 0);

variable carry_out : STD_LOGIC_VECTOR(7 downto 0);

variable overflow : std_logic;

begin

-- condition for this (A+B) operation

carry_in := carry_out;

carry_out := "00000000";

--overflow(7) := '1';

-- compute the result of adder

for i in 0 to 7 loop

arith_out(i) := (operand_A(i) xor operand_B(i)) xor carry_in(i);

carry_out(i+1) := (operand_A(i) and operand_B(i)) or

((operand_A(i) xor operand_B(i)) and carry_in(i));

end loop;

return arith_out;

if carry_out(7) := '1' then

return overflow;

end if

end;

I also need to design this using RTL concept which consist of

datapath, controller and structural. My plan is currently to control

the input operand_B by using multiplexer (because operand_A) will

always be used every time arithmetic operation.

What i want to do is to say something like when i select operand (A+B)

operand_B is positive/1, when (A-B) operand_B is negative.. (based on

the full adder truth table). can anybody teach me how to assign this ?

which one would be the better option either to write using function or

procedure ? pls give comments ?

thank you very much.