Multi Valued logic simulation using VHDL?

Hi!

I have taken on a project of benchmarking the relative performance of
a binary ALU Vs a ternary ALU. I was wondering if I could use VHDL to
program a simple ALU that does multiplication, addition and division
for multi-valued logic and if so, could someone point me to recources
where I can find more information about the same?

thanks.

Guru Prasad