I understand why you don't. It is not just simple. It may take many hours to
check all possible combinations. Search for relevant Xilinx Answers
typically follows this. Eventually, you realize that the answers are
incorrect. Thanx to me Xilinx has closed two misleading Xilinx Answers last
week. Both about handling configuration in VHDL.
The first thing is about binding one of multiple architectures to entity for
synthesis:
http://www.xilinx.com/xlnx/xil_ans_d...tPagePath=4969
In fact, the problem still persists in ISE6.1. It is scheduled to be fixed
in one of the next software releases.
Using configuration for binding components to entities does not work as
well.