Go Back   Velocity Reviews > Newsgroups > VHDL
User Name
Password
Register FAQ Members List Calendar Search Today's Posts Mark Forums Read

Reply

VHDL - Modelsim 5.7c behaviour

 
Thread Tools Search this Thread
Old 10-08-2003, 09:50 AM   #1
Default Modelsim 5.7c behaviour


Hallo,

I use Modelsim 5.7c since yesterday. Before this I uses 5.6e.
I now get a warning when compiling a vhdl-file, in the following form:

WARNING[10]: E:/Hu-Moment-Berechnung/src/hu_unit.vhd(162): Synthesis
Warning: Signal "state" appears in process "steuerung"'s senstivity
list, but it is not used in the clock expression or reset expression.

I have set all signals, thta are read in a process in it's sensitivity
list. Former versions of modelsim showed an error, when the signal names
were missing. This version schows an error, when the signals are there.

What's wrong with my code or modelsim?


My code:
steuerung: PROCESS(HU_UNIT_EN, div_xs_quotient, div_xs_rdy, state,CLK,RESET)
BEGIN
IF RESET = '1' THEN
state <= IDLE;
div_xs_en <= '0';
xs_s <= (others=>'0');
ELSIF CLK'EVENT AND CLK='1' THEN
CASE state IS
-- IDLE = Startzustand nach RESET
WHEN IDLE =>
IF HU_UNIT_EN = '1' THEN
state <= XS;
END IF;
div_xs_en <= '0';

Thanks for your help in advance.
Regards,
Ingmar Seifert



Ingmar Seifert
  Reply With Quote
Old 10-08-2003, 11:52 AM   #2
Jim Wu
 
Posts: n/a
Default Re: Modelsim 5.7c behaviour

> WARNING[10]: E:/Hu-Moment-Berechnung/src/hu_unit.vhd(162): Synthesis
> Warning: Signal "state" appears in process "steuerung"'s senstivity
> list, but it is not used in the clock expression or reset expression.
>


> steuerung: PROCESS(HU_UNIT_EN, div_xs_quotient, div_xs_rdy,

state,CLK,RESET)

In a clocked process, only CLK and RESET need to be in the sensitivity list.

Jim Wu
(remove capital letters)
http://www.geocities.com/jimwu88/chips




Jim Wu
  Reply With Quote
Old 10-08-2003, 11:57 AM   #3
Allan Herriman
 
Posts: n/a
Default Re: Modelsim 5.7c behaviour
On Wed, 08 Oct 2003 10:50:04 +0200, Ingmar Seifert
<> wrote:

>Hallo,
>
>I use Modelsim 5.7c since yesterday. Before this I uses 5.6e.
>I now get a warning when compiling a vhdl-file, in the following form:
>
>WARNING[10]: E:/Hu-Moment-Berechnung/src/hu_unit.vhd(162): Synthesis
>Warning: Signal "state" appears in process "steuerung"'s senstivity
>list, but it is not used in the clock expression or reset expression.
>
>I have set all signals, thta are read in a process in it's sensitivity
>list. Former versions of modelsim showed an error, when the signal names
>were missing. This version schows an error, when the signals are there.
>
>What's wrong with my code or modelsim?



The prevision version of Modelsim (5.6e) was wrong. The new version
(5.7c) is correct.
Previously, Modelsim would check that every signal used in the process
was in the sensitivity list. This is fine for combinatorial but wrong
for clocked processes.

Now, it can identify clocked processes (or clocked processes with
async resets), and checks that only the clocks and resets are in the
sensitivity list.

>My code:
>steuerung: PROCESS(HU_UNIT_EN, div_xs_quotient, div_xs_rdy, state,CLK,RESET)


should be:

>steuerung: PROCESS(CLK,RESET)


Regards,
Allan.


Allan Herriman
  Reply With Quote
Reply


Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

vB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off

Similar Threads
Thread Thread Starter Forum Replies Last Post
Error in Modelsim 6.0a boitsas Software 1 10-26-2009 05:36 AM
simprim problems on modelsim saiyijinprince Hardware 2 04-05-2007 02:24 PM
Need help on Modelsim VHDL syntax? ASAP:) kaji General Help Related Topics 0 03-14-2007 10:43 PM
Need help on a Modelsim VHDL Syntax? ASAP:) kaji Software 0 03-14-2007 10:43 PM
Need Help on a Modelsim VHDL Syntax....ASAP:) kaji Hardware 0 03-14-2007 10:41 PM




SEO by vBSEO 3.3.2 ©2009, Crawlability, Inc.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46