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Sorry for this silly question, but the issue bugs me a little.
I have the logical expression: /A*/B + A*B ( / means not...) could'nt this expression be reducved more???? Don Don |
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#2 |
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Posts: n/a
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On Fri, 26 Sep 2003 10:50:05 +0200, "Don" <> wrote:
>Sorry for this silly question, but the issue bugs me a little. >I have the logical expression: > >/A*/B + A*B > >( / means not...) > >could'nt this expression be reducved more???? I translate this to VHDL (it *is* comp.lang.vhdl, after all) as (not a and not b) or (a and b) Is this what you meant? It is equivalent to (a xnor b) If your target hardware is lookup table based, then this already produces the smallest amount of logic (1 LUT). If your target hardware has an XNOR (or XOR) cell, it will probably be smaller than the separate ANDs, OR and NOTs. If you are making this out of transistors, there are some tricks you can pull. I can get it down to 8 transistors after a few seconds thought (two inverters and two transmission gates). Was this homework? Regards, Allan. Allan Herriman |
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#3 |
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Posts: n/a
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"Allan Herriman" <> wrote in
message news:... > On Fri, 26 Sep 2003 10:50:05 +0200, "Don" <> wrote: > > >Sorry for this silly question, but the issue bugs me a little. > >I have the logical expression: > > > >/A*/B + A*B > > > >( / means not...) > > > >could'nt this expression be reducved more???? > > I translate this to VHDL (it *is* comp.lang.vhdl, after all) as > > (not a and not b) or (a and b) > > Is this what you meant? > > It is equivalent to (a xnor b) > > If your target hardware is lookup table based, then this already > produces the smallest amount of logic (1 LUT). > If your target hardware has an XNOR (or XOR) cell, it will probably be > smaller than the separate ANDs, OR and NOTs. > If you are making this out of transistors, there are some tricks you > can pull. I can get it down to 8 transistors after a few seconds > thought (two inverters and two transmission gates). > > Was this homework? > > Regards, > Allan. Thank you very much. Don Don |
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