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I have made a controller for a zbt sram that has sa[17..0] and dq[12..0]. I
want to simulate the controller with a zbt sram model with sa[3..0] and
dq[3..0]. How is it possible to connect pin of different width without
changing vhdl source file?

Thanks a lot.

Michele Bergo

Assign sa(3:0) of the controller to the RAM model & similar for address.
leave the higher order bits unconnected if driving, or tie to a value like
'0' or '1' if driven,
so they have a valid value.

Niv.

"michele bergo" <> wrote in message
news:qYN1b.260449$.. .
> I have made a controller for a zbt sram that has sa[17..0] and dq[12..0].
I
> want to simulate the controller with a zbt sram model with sa[3..0] and
> dq[3..0]. How is it possible to connect pin of different width without
> changing vhdl source file?
>
> Thanks a lot.
>
> Michele Bergo
>
>