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Hi,

I have a problem when implementing the project in VHDL with Altera
Apex20ke.

I nned to write data first to Sram. After finishing writing, read data
to PC through UART. SRAM is asychronous sram. I assigned pins
according to the datasheet. And UART works well. The problem is the
clock difference in writing and reading. the writing clock is 10mhz.
And reading clock is just uart-clock , much slower than 10mhz.

Does anybody have freeIP for writing data to SRam and then reading
them to PC?

Thank you.

Sarah

On a sunny day (13 Aug 2003 08:37:36 -0700) it happened
(sarah) wrote in <> :

>Hi,
>
>I have a problem when implementing the project in VHDL with Altera
>Apex20ke.
>
>I nned to write data first to Sram. After finishing writing, read data
>to PC through UART. SRAM is asychronous sram. I assigned pins
>according to the datasheet. And UART works well. The problem is the
>clock difference in writing and reading. the writing clock is 10mhz.
>And reading clock is just uart-clock , much slower than 10mhz.
>
>Does anybody have freeIP for writing data to SRam and then reading
>them to PC?
>
>Thank you.
>
>Sarah
>
Multiplexers in address and data lines of the SRAM.
Connect SRAM to circuit 1 and write.
Connect SRAM to circuit 2 and read.
?