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I'm trying to create a function that will convert state_value types (see
below) to std_logic_vectors so i can monitor state transitions, but I keep
getting the following error:

ERROR ... LINE 35 The type of the operand of type conversion must be
determinable independent of the context

Here's a stripped version of my broken code:
----------------------------------------------------------------------------
-------------
architecture state_machine of logic_unit is
type state_value is (S0_WAIT_FOR_ACQ, S1_INIT, S2_WAIT_VE,
S3_RD_RAM, S4_WAIT, S5_WR_RAM, S6_CLR_VE);

function stateToVec (st : state_value)
return std_logic_vector(3 downto 0) is -- LINE 35
begin
return "0000";
end stateToVec;
begin
....
----------------------------------------------------------------------------
-------------

If I change the return type to std_logic, it works just fine, but isn't of
much use to me. Can anyone tell me what I'm doing wrong or a better way to
do this?

Thanks,
Greg

You need declare subtype first:

subtype std_logic_vector4 is std_logic_vector(3 downto 0);
function stateToVec (st : state_value) return std_logic_vector4 is
begin
return "0000";
end stateToVec;

or return simply std_logic_vector without constraint:

function stateToVec (st : state_value) return std_logic_vector is
begin
return "0000";
end stateToVec;


regards,
MK.

"Greg Dunn" <> wrote in message
news:MWETa.644$ y.com...
> I'm trying to create a function that will convert state_value types (see
> below) to std_logic_vectors so i can monitor state transitions, but I keep
> getting the following error:
>
> ERROR ... LINE 35 The type of the operand of type conversion must be
> determinable independent of the context
>
> Here's a stripped version of my broken code:
> --------------------------------------------------------------------------
--
> -------------
> architecture state_machine of logic_unit is
> type state_value is (S0_WAIT_FOR_ACQ, S1_INIT, S2_WAIT_VE,
> S3_RD_RAM, S4_WAIT, S5_WR_RAM,
S6_CLR_VE);
>
> function stateToVec (st : state_value)
> return std_logic_vector(3 downto 0) is -- LINE 35
> begin
> return "0000";
> end stateToVec;
> begin
> ...
> --------------------------------------------------------------------------
--
> -------------
>
> If I change the return type to std_logic, it works just fine, but isn't of
> much use to me. Can anyone tell me what I'm doing wrong or a better way
to
> do this?
>
> Thanks,
> Greg
>
>

If the sub-type suggestion doesn't help, try a variable.

....
function stateToVec (st : state_value) return std_logic_vector(3 downto 0) is
variable result : std_logic_vector(3 downto 0);
begin
case st is
when others =>
result := X"0"; -- requires 1993, or use result := "0000";
end case;
return result;
....

"Greg Dunn" <> wrote in message news:<MWETa.644$ gy.com>...
> I'm trying to create a function that will convert state_value types (see
> below) to std_logic_vectors so i can monitor state transitions, but I keep
> getting the following error:
>
> ERROR ... LINE 35 The type of the operand of type conversion must be
> determinable independent of the context
>
> Here's a stripped version of my broken code:
> ----------------------------------------------------------------------------
> -------------
> architecture state_machine of logic_unit is
> type state_value is (S0_WAIT_FOR_ACQ, S1_INIT, S2_WAIT_VE,
> S3_RD_RAM, S4_WAIT, S5_WR_RAM, S6_CLR_VE);
>
> function stateToVec (st : state_value)
> return std_logic_vector(3 downto 0) is -- LINE 35
> begin
> return "0000";
> end stateToVec;
> begin
> ...
> ----------------------------------------------------------------------------
> -------------
>
> If I change the return type to std_logic, it works just fine, but isn't of
> much use to me. Can anyone tell me what I'm doing wrong or a better way to
> do this?
>
> Thanks,
> Greg