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Hi,

Would anyone be able to recommend a VHDL RTL project (ideally not too
large e.g. a peripheral) which meets the following criteria :

1) Has a testbench providing "good" coverage
2) The testbench is automated i.e provides a "go/no go" indication
3) The testbench has a regression suite
4) The project was kept under version control during development
5) The project was regularly checked in during development (both RTL +
testbench)
6) The project source code is publicly available (via the net)
7) The version control repository of the source code is publicly
available (via the net)

I am aware of opencores.org and I don't want to lose time looking
through alot of projects trying to find one which meets the above
criteria. Projects meeting these criteria are rare even if we forget 6)
and 7)

Thanks for any help.

Mark