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vhdl cpu emulator (any interest?)
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During the design of my latest FPGA, I wrote a vhdl cpu emulator. I
would like to know if there is interest in the (open source) FPGA
community for such a vhdl cpu emulator?

The emulator supports:
reading and writing from / to memory on the FPGA
waiting for interrupts or set periods of time
multiple threads
cpu global registers
thread local registers
setting local registers based on thread arguments when spawning
one level while loop
one level of if with else statement
outputting data read during a read to a file

CPU commands come from a main file, and each thread has its own
separate file.

If there is already something like this out there, I would love to hear
about it.


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D Stanford
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Sites like specialize in different types of HDL cores,
including CPUs. It's not clear from your description if you have an
VHDL cpu or a testbench component that emulates a CPU. Either way, a
place like would be where to look for other emulators, or
a place to publish your emulator.

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