Velocity Reviews - Computer Hardware Reviews

Velocity Reviews > Newsgroups > Programming > VHDL > ram model

Reply
Thread Tools

ram model

 
 
ashutosh_k
Guest
Posts: n/a
 
      04-17-2006
hi

I have a text file that contains about 50,000 hex words (each 8 bits).
now i have to read these words into a code and do some process.
textio is not supported in vhdl..so i have to send these words to a ram
on the target borad.(am i right?) how do i do this ...sending words
from a text file to a ram..
i read this on the group about ram model..can some one sujjest the
process to do the same. some good links for this

ashu

 
Reply With Quote
 
 
 
 
Michelangelo Masini
Guest
Posts: n/a
 
      04-22-2006



> textio is not supported in vhdl..


Textio is supported in VHDL:

use std.textio.all;
 
Reply With Quote
 
 
 
 
Andy
Guest
Posts: n/a
 
      04-24-2006
If you only need to initialize the ram (in simulation), then you can
write a function that uses text-io to compute the initial contents,
then returns the array data. Then call that function when you
declare/initialize the array:

signal ram : my_array := init_array(file);

Andy

 
Reply With Quote
 
 
 
Reply

Thread Tools

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
RAM with Fault model o.tamimi@hotmail.co.uk VHDL 0 06-25-2008 12:06 AM
Convert Java Model to Java Model without XML erinbot@gmail.com Java 1 10-06-2006 09:00 PM
modelsim crashs with large ram simulation model Hongtu VHDL 3 10-08-2004 11:06 AM
RAM question for VprMatrix 2000 model Lenny Konstan Computer Information 2 01-21-2004 10:07 PM
Looking for a VHDL or Verilog RAM Model that modles Common RAM Faults Robert Posey VHDL 0 11-26-2003 07:50 PM



Advertisments