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Search: Posts Made By: Irina I. Kuznetsova
Forum: VHDL 10-03-2012
Replies: 0
Views: 614
FPGA - Offset in/out values

Hello,

I'm working on a VHDL project using Xilinx ISE 14.1 and I'm facing some troubles with Timing Constraints.

As far as the Period constraint is asked there's no problem, I understand it;...
Forum: Hardware 10-02-2012
Replies: 0
Views: 807
FPGA - Offset in/out values

Hello,

I'm working on a VHDL project using Xilinx ISE 14.1 and I'm facing some troubles with Timing Constraints.

As far as the Period constraint is asked there's no problem, I understand it;...
Showing results 1 to 2 of 2

 
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