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Forum: VHDL 02-12-2009
Replies: 1
Views: 1,642
Posted By poulette
array of STD_LOGIC to STD_LOGIC_VECTOR

Hi,
I would like to know if there is a way to put a signal STD_LOGIC_VECTOR in an array of STD_LOGIC ??

Ex :

type X is array(7 downto 0) of STD_LOGIC;
signal Y : X;

signal A :...
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