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Search: Posts Made By: andrew_ross
Forum: VHDL 11-14-2008
Replies: 3
Views: 2,516
Posted By andrew_ross
thanks everybody and sorry..I have not studied so...

thanks everybody and sorry..I have not studied so much in effect..

My answer is : how should I implement the design of the alu..
the ipotetic if-then-elsif--.. are due to 2 inputsignals at the...
Forum: VHDL 11-13-2008
Replies: 0
Views: 560
Posted By andrew_ross
Simple ALU Implementation

Hi guys,
I have to implement a simple ALU of a 32bit mips..I have already implemented many submodules (adder,multipliers,shifter...) ,that I have to instantiate in the top level module "ALU_TOP"....
Forum: VHDL 11-10-2008
Replies: 2
Views: 462
Posted By andrew_ross
Just because COMPONENT CLA is a module itself...

Just because COMPONENT CLA is a module itself implemented with generics..xilinx compiler apparently don't get any errors for that..

I have to implementit to fpga spartan III
Forum: VHDL 11-10-2008
Replies: 2
Views: 462
Posted By andrew_ross
Compiling Error : "Value of index is not static"

Hi,
I'm implementing a simple ripple carry adder using instances of a simple adder (called CLA...that works..).The ripple carry adder is generic , N is the bit widht.
Unfortunately when I loop to...
Forum: VHDL 11-06-2008
Replies: 2
Views: 2,346
Posted By andrew_ross
Thanks a lot..I'll try right right now..

Thanks a lot..I'll try right right now..
Forum: VHDL 11-06-2008
Replies: 2
Views: 2,346
Posted By andrew_ross
Unsigned subtraction

Hi guys..
I have to use a carry look ahead adder component (32bit), to implement a module able to perform addition (both signed and unsigned) , subtraction(signed and unsigned).
The only issue is...
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