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Forum: VHDL 03-11-2009
Replies: 0
Views: 454
Posted By Mike
Please help with Post-PAR simulation

Hi,

I am using the Xilinx ISE 9.2i to generate the post-PAR simulation model and using ModelSim PE 6.1e to simulate.
However, I get the warning below when I tried to perform post PAR simulation....
Forum: VHDL 03-11-2009
Replies: 3
Views: 1,788
Posted By Mike
Please help with post-PAR simulation

I the warning below when I tried to perform post PAR simulation.

Loading work.tb_post_par_sim(func)
# ** Warning: (vsim-3473) Component instance "uut : ssdn_bb_fpga_ert_timesim" is not bound.
# ...
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