hardware implementation of mod operation
I am just wondering how is the mod operation in the vhdl is implemented in the hardware?
For example, if I have mod(42,30), assuming the entries are integers, how will this be implemented in hardware?
Because I know that Synplify, supports non-power-2 mod operations, so I can just use the function as is, but I just want to see how it is being translated into vhdl logic description.
So, does is actually utilize a dedicated multiplier for this? And is it going to give results within one clock cycle, no matter how big the integers are?
If that is the case, then does anyone know of a hardware efficient implementation of the mod operation? Maybe something that uses less resources?
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