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whereismelvin@gmail.com 11-20-2008 08:20 AM

test bench
 
I wrote a testbench in which i declared a variable ic as bit_vector (3
to 0). now when i tried putting
ic:=ic + 1 inside a loop it shows operator argument type mismatch.
I treid declaring it as signed and unsigned.

Tricky 11-20-2008 09:12 AM

Re: test bench
 
On 20 Nov, 08:20, whereismel...@gmail.com wrote:
> I wrote a testbench in which i declared a variable ic as bit_vector (3
> to 0). now when i tried putting
> ic:=ic + 1 inside a loop it shows *operator argument type mismatch.
> I treid declaring it as signed and unsigned.


Im guessing you are using the following:

use ieee.std_logic_arith.all;
use iee.std_logic_unsigned.all;
use iee.std_logic_signed.all;

replace all of these with ieee.numeric_std.all;

then, done declare ic as a bit_vector, declare it as unsigned/signed
and it should work.

so:

process
variable ic : unsigned(3 downto 0) := "0000"; --or put the
initial state in the reset path
begin
....
ic := ic + 1;
....
end process;

this will work fine.


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