Iam working on simplex algorithm for a CMOS inverter circuit..
it consists of 5 cmos inverters split in 2 paths. 3 at top and 2 at bottom
connected to same supply.i have to vary all the parameters lik W/L or drain , source area to eqaulise the delays from both the paths at the end of both the paths..
how do i go about it?
should i make delay times a function of some parameters i have to vary??
Plz if anyone has some idea, den reply
|All times are GMT. The time now is 10:00 PM.|
Powered by vBulletin®. Copyright ©2000 - 2013, vBulletin Solutions, Inc.
SEO by vBSEO ©2010, Crawlability, Inc.