VHDL and MATLAB
I would like to know how to enter an input from Simulink to a VHDL model i have.
I have made several simulations but the case here is that my input port of my entity is an array of std_logic_vector. I have used succesfully the Random Number Generator in Simulink as an input to a simple std_logic_vector input port, but i can't find a way to enter an input to an ARRAY of std_logic_vector. Any recommendations?
|All times are GMT. The time now is 02:56 AM.|
Powered by vBulletin®. Copyright ©2000 - 2014, vBulletin Solutions, Inc.
SEO by vBSEO ©2010, Crawlability, Inc.