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-   -   unsigned to integer conversion (http://www.velocityreviews.com/forums/t377638-unsigned-to-integer-conversion.html)

john 02-23-2007 05:55 PM

unsigned to integer conversion
 
Hello,

i have a 48 bit unisgned numbers and need to convert them to integer.
I used to_integer functioin but getting the eroor that this function
only works with numbers less than 32 bit. can anyone suggest another
function or technique.

John


Ben Jones 02-23-2007 06:10 PM

Re: unsigned to integer conversion
 

"john" <conphiloso@hotmail.com> wrote in message
news:1172253332.875219.149770@8g2000cwh.googlegrou ps.com...
> Hello,
>
> i have a 48 bit unisgned numbers and need to convert them to integer.
> I used to_integer functioin but getting the eroor that this function
> only works with numbers less than 32 bit. can anyone suggest another
> function or technique.


An integer in VHDL is only 32 bits wide. In fact, it's not even that wide,
since the most-negative value (-2**31) is not part of the defined range for
integers.

If you need to manipulate numbers that are wider than 31 bits, you cannot
use VHDL's built-in integer type. Sorry.

-Ben-



Nicolas Matringe 02-23-2007 08:30 PM

Re: unsigned to integer conversion
 
Ben Jones a écrit :
> "john" <conphiloso@hotmail.com> wrote in message
> news:1172253332.875219.149770@8g2000cwh.googlegrou ps.com...
>> Hello,
>>
>> i have a 48 bit unisgned numbers and need to convert them to integer.
>> I used to_integer functioin but getting the eroor that this function
>> only works with numbers less than 32 bit. can anyone suggest another
>> function or technique.

>
> An integer in VHDL is only 32 bits wide. In fact, it's not even that wide,
> since the most-negative value (-2**31) is not part of the defined range for
> integers.
>
> If you need to manipulate numbers that are wider than 31 bits, you cannot
> use VHDL's built-in integer type. Sorry.


You could try by splitting your unsigned vector and converting each
slice to integer. You'll probably need to define an array of integers
type to keep your slices together in a single object (signal or variable)
I did it once for a 96 bits wide memory model (storing integers is less
memory consuming than storing vectors)

Nicolas


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