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Analog Guy 09-29-2004 09:18 PM

Writing Testbench Output Results
 
I am a bit confused about how to write testbench results to both the
ModelSim screen as well as to an output file??? I was under the
assumption that a WRITELINE destroys the LINE variable, hence I tried
the following:

PROCEDURE print_main_header (text_in : IN STRING) IS
VARIABLE L : LINE;
VARIABLE F : LINE;
BEGIN
WRITE(L, MAJOR_DIVIDER);
F := L;
WRITELINE(OUTPUT, L); -- write to ModelSim window
WRITELINE(output_file, F); -- write to file


But received the following ModelSim failure:

** Failure: (vsim-5) ****** Memory failure. *****
# Bad pointer/access type passed to memory subsystem.
# Pointer may have been previously deallocated.

Any explanation of the problem would be appreciated.

Jim Lewis 09-29-2004 10:37 PM

Re: Writing Testbench Output Results
 
In the next revision of VHDL, we are adding a function
like the following to std.textio:

procedure tee (file F : TEXT; variable L : in LINE) is
variable CopiedBuf : LINE;
begin
CopiedBuf := new STRING'(L.all);
writeline(F, CopiedBuf);
deallocate (CopiedBuf);
writeline(OUTPUT, L) ;
end procedure tee;

If you do this alot and decide to put it in a package,
do not name it tee as when the next revision of the language
is released, you will have a name conflict.

Cheers,
Jim

> I am a bit confused about how to write testbench results to both the
> ModelSim screen as well as to an output file??? I was under the
> assumption that a WRITELINE destroys the LINE variable, hence I tried
> the following:
>
> PROCEDURE print_main_header (text_in : IN STRING) IS
> VARIABLE L : LINE;
> VARIABLE F : LINE;
> BEGIN
> WRITE(L, MAJOR_DIVIDER);
> F := L;
> WRITELINE(OUTPUT, L); -- write to ModelSim window
> WRITELINE(output_file, F); -- write to file
>
>
> But received the following ModelSim failure:
>
> ** Failure: (vsim-5) ****** Memory failure. *****
> # Bad pointer/access type passed to memory subsystem.
> # Pointer may have been previously deallocated.
>
> Any explanation of the problem would be appreciated.



--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~
Jim Lewis
Director of Training mailto:Jim@SynthWorks.com
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~


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