- **VHDL**
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- - **Re: Representation of real numbers**
(*http://www.velocityreviews.com/forums/t21346-re-representation-of-real-numbers.html*)

Re: Representation of real numbersAs an add-on to this quetsion, are real numbers always synthesizable or only
certain architectures? "Jeremy Pyle" <jeremyp@rochester.rr.com> wrote in message news:e%HKa.33938$kQ5.33752@twister.nyroc.rr.com... > Hey all, > > I'm trying to find out how I would get a hold of the representation of a > real number. I know it's represented at a sign bit, exponent, mantissa, but > I'm trying to store this real number in RAM, meaning I have to pass it in as > a STD_LOGIC_VECTOR, so somehow I need to convert a real to a > STD_LOGIC_VECTOR. Is there any way to do this? > > Also, I have to divide the real numbers so I'm trying to figure out the best > way to do it. Here are my two choices: > 1. just use the division operator provided for real numbers > 2. use the XiLinx dividor module provided in XiLinxCoreLib. > > If anyone could tell me the pros and cons of using one over the other that > would be fantastic. > > Thanks all, > > Jeremy > > |

Re: Representation of real numbersIn article <0VMKa.34026$kQ5.19014@twister.nyroc.rr.com>,
Jeremy Pyle <jeremyp@rochester.rr.com> wrote: >As an add-on to this quetsion, are real numbers always synthesizable or only >certain architectures? Real ALUs take up a lot of space. If you are trying to do an add in one stroke, you have to have a normalizing array and an adder. This is a lot of logic so some tools won't even try unless you are designing for a really big chip. -- -- kensmith@rahul.net forging knowledge |

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