vhdl cpu emulator (any interest?)
During the design of my latest FPGA, I wrote a vhdl cpu emulator. I
would like to know if there is interest in the (open source) FPGA
community for such a vhdl cpu emulator?
The emulator supports:
reading and writing from / to memory on the FPGA
waiting for interrupts or set periods of time
cpu global registers
thread local registers
setting local registers based on thread arguments when spawning
one level while loop
one level of if with else statement
outputting data read during a read to a file
CPU commands come from a main file, and each thread has its own
If there is already something like this out there, I would love to hear
Re: vhdl cpu emulator (any interest?)
Sites like OpenCores.org specialize in different types of HDL cores,
including CPUs. It's not clear from your description if you have an
VHDL cpu or a testbench component that emulates a CPU. Either way, a
place like opencores.org would be where to look for other emulators, or
a place to publish your emulator.
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