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		Rating Thread / Thread Starter	Last Post	Replies	Views
		Question about Gaussian Noise Generator?	Yesterday 10:38 PM by oscarvhdl	2	10
		SPAM levels	Yesterday 11:41 AM by Pascal Peyremorte	3	17
		Generic Comparator using VHDL	Yesterday 12:26 AM by joris	1	18
		Representing the buffer with logic gates,flipflops ( 1 2)	11-06-2009 06:02 PM by jeppe	13	131
		Operator problem VHDL. Beginner	11-06-2009 03:24 PM by StuartHobday	1	13
		generic	11-06-2009 02:09 PM by Andy	1	10
		VHDL Beginner Help	11-06-2009 11:21 AM by debayan_p	1	33
		Re: Spam on comp.lang.vhdl ( 1 2)	11-06-2009 10:25 AM by James Harris	12	169
		Quantization	11-06-2009 08:34 AM by Pascal Peyremorte	1	21
		Variable Read Before Assigned	11-06-2009 07:35 AM by Jan Decaluwe	5	19
		Ethernet and TCP/IP proto in vhdl	11-05-2009 03:04 PM by pini	7	4,038
		Problem populating a SLV using aggregates	11-05-2009 03:00 PM by Kenn Heinrich	5	20
		Creating delay in divider	11-04-2009 05:09 PM by KJ	1	21
		GTKWave not showing signals of user types	11-04-2009 04:19 PM by mlefter	0	23
		How to describe a pipeline structure in VHDL ( 1 2)	11-04-2009 07:25 AM by swatig29	10	7,000
		Generate Statement	11-03-2009 08:13 AM by joris	1	25
		how to output a 400hz sound from a xs 95 board using a 4 bit counter	11-02-2009 04:36 PM by jazzman519	0	20
		Selecting generic at simulation time.	11-02-2009 04:21 PM by Andy	2	20
		[EN]&[IT] VHDL, memory hierarchy	11-02-2009 04:00 PM by pato86	1	113
		I am using FPGA advantage for HDL design , version 7.2 : VistaProblem	11-02-2009 10:03 AM by walidelmasry	1	705

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